AI Researcher - Efficient AI (Contractor)

 

About the Team - LG's Emerging Technology Lab
LG's Emerging Technology Lab (ETL) is the catalyst for technological innovation within LG’s CTO organization. Located in the Silicon Valley and New Jersey, we drive excellence across CTO organizations and business units by pioneering in select emerging technology areas. As the Center of Excellence (CoE), we define and shape key technology domains, setting strategic directions that foster impactful internal and external partnerships to deliver measurable business value.

About the Opportunity
We are seeking a Contract AI Researcher - Efficient AI to join LG's Emerging Technology Lab in Santa Clara, CA (hybrid). This is an exciting opportunity to work at the forefront of AI efficiency research, developing technologies that make modern LLMs, VLMs, multimodal models, and AI agents faster, smaller, and more deployable in real-world environments.

In this role, you will explore cutting-edge areas such as model compression, quantization, efficient inference, reasoning optimization, and next-generation AI architectures. Your work will help enable advanced AI capabilities across LG's future products and platforms, including AI PCs, edge devices, robotics, and intelligent vehicle systems.

The ideal candidate enjoys bridging research and implementation, transforming ideas from the latest scientific literature into working prototypes and measurable improvements. You will have the opportunity to collaborate with experienced researchers, contribute to publications and intellectual property, and help shape the future of efficient, on-device AI.

Responsibilities
•    Research, prototype, and implement AI methods that improve model efficiency, inference performance, and deployment feasibility on constrained devices.
•    Optimize modern LLMs, SLMs, VLMs, multimodal models, and agentic workloads across post-training, inference, and deployment workflows.
•    Propose and evaluate novel compression methods (PTQ, QAT, pruning, low-rank approximation, etc) for on-device LLM/VLM enablement.
•    Devise approaches to address challenges related to long-context inference and KV cache compression in the context of reasoning and agentic applications.
•    Develop gradient-free and backpropagation-free methods for model merging, compression, and efficiency-driven optimization.
•    Implement and evaluate emerging efficient architectures and modules, including MoE, SSMs, hybrid models, Looped Transformers, etc.
•    Prototype inference-time optimization methods such as speculative decoding, constrained decoding, low-latency generation, and kernel-level optimization.
•    Build experimental pipelines, perform evaluations on standardized language, vision, reasoning, and agentic benchmarks.
•    Contribute to publications, technical reports, open-source releases, invention disclosures, and IP submissions where appropriate.

Required Qualifications
•    M.S. or Ph.D. in Computer Science, Computer Engineering, Machine Learning, Mathematics, or a related technical field. Relevant post-graduate research and/or industry experience is preferred but not required.
•    Research or engineering experience in ML, efficient AI, model optimization, or AI systems.
•    Strong programming ability in Python and experience with PyTorch or a comparable deep learning framework.
•    Hands-on experience with modern LLMs, SLMs, VLMs, multimodal models, or generative AI systems.
•    Ability to read research papers, implement technical methods, run experiments, and communicate results clearly.
•    Comfortable working in a fast-moving and ambiguous technical environment.
•    Strong written and verbal communication skills for reports, presentations, demos, and technical documentation.

Ways to Stand Out
•    Publications in reputable venues in ML and/or systems space (e.g., ICML, ICLR, NeurIPS, ACL, COLM, EMNLP, MLSys, MICRO, etc).
•    Experience with modern LLM/VLM inference and deployment frameworks such as llama.cpp, GGUF, vLLM, SGLang, TensorRT-LLM, or related systems.
•    Experience with efficiency-aware post-training or finetuning methods such as PTQ, QAT, LoRA, distillation, instruction tuning, DPO, OPD, RLVR, or reasoning-oriented adaptation.
•    Experience with low-level kernel implementations and on-device acceleration.
•    Familiarity with emerging architectures such as MoE, SSMs, hybrid attention, or Looped Transformers.
•    Experience with AI-assisted optimization, multi-a